This application claims priority from Korean Patent Application No. 2002-55386, filed on Sep. 12, 2002, which is incorporated herein by reference in its entirety.
The present invention relates in general to power electronics and more particularly to a method and apparatus for switching insulated gate field effect transistors (IGBTs).
In power systems using power semiconductor devices, if a power rating and a switching frequency increase, power consumption of the switching power devices increases. The high power consumption increases the junction temperature of the power devices which in turn may cause device reliability problems. One approach in addressing this problem has been to use two parallel-connected power devices and drive the gates of the two devices with two signals which have the same frequency and phase or two signals which have the same frequency but a predetermined phase difference.
FIG. 1 is a circuit diagram showing an example of a conventional switching circuit system having two IGBTs 110, 120, and FIG. 2 shows waveforms of the signals applied to the gates of IGBTs 110, 120. Referring to FIG. 1, IGBTs 110, 120 are connected together in parallel. An inductor L and a fast recovery diode DFR are respectively connected in series with a common collector terminal of IGBTs 110, 120. As can be seen, the system has a simplified structure and thus low cost.
As shown in FIG. 2, signals PWMG1 and PWMG2 respectively applied to gate terminals G1 of IGBT 110 and G2 of IGBT 120 have the same frequency and phase. As shown, the two signals have a fixed period T but are pulse-modulated, that is, the pulse widths may vary from one cycle to the next. However, both signals PWMG1 and PWMG2 have the same pulse modulation. Thus, IGBTs 110, 120 are turned on or off simultaneously. Ideally, when both IGBTs 110, 120 are simultaneously turned on to transfer current, the current and thus the generated heat are distributed between the two IGBTs. As such, the current rating is reduced in half which decreases power loss. However, in practice, the first IGBT 110 and the second IGBT 120 do not have the same characteristics due to variations in the manufacturing process. As a result, the current through IGBT 110 and IGBT 120 is not the same, and in the worst case, the semiconductor devices may be destroyed due to thermal imbalance.
FIG. 3 is a circuit diagram showing another example of a conventional switching circuit system having two IGBTs 210 and 220, and FIG. 4 shows waveforms of signals applied to the gates of the two IGBTs. Referring to FIG. 3, IGBTs 210, 220 have their collector terminals decoupled from each other. Inductor L1 and L2 are respectively connected to the collectors of IGBTs 220 and 210. Similarly, fast recovery diodes DFR1 and DFR2 are respectively connected to the collectors of IGBTs 220 and 210. Although not shown, inductors L1 and L2 are connected to an alternating current (AC) source through a rectifying circuit, and diodes DFR1 and DFR2 are connected to a load terminal. Alternatively, inductors L1 and L2 may be connected to a direct current (DC) source without passing through the rectifying circuit.
Pulse-modulated signals PWMG1 and PWMG2 are respectively applied to gate terminals G1 of IGBT 210 and G2 of IGBT 220. As shown in FIG. 4, signals PWMG1 and PWMG2 have the same period T but a phase difference of a half period T/2. Thus, depending on the pulse modulation, the duration in each cycle when the two IGBTs are turned on may overlap. By decoupling the collectors of the two IGBTs and providing each IGBT its own inductor and diode, the generated heat in each cycle is distributed between the two IGBTs and the overall thermal resistance is reduced, thus allowing this system to be used in high power systems. However, because this system requires an additional passive device such as an inductor, and an additional active device such as a fast recovery diode, the overall system becomes more complicated and more costly. Also, the characteristics of the two IGBTs 210, 220 are not the same, and similarly the characteristics of the two inductors L1 and L2 are not the same. Thus, in order to insure that the same current flows through the two parallel-connected blocks, an additional circuit for current sharing is needed.
Thus, an improved method and structure for switching IGBTs is desirable.
In accordance with the present invention, a method of switching first and second parallel-connected insulated gate bipolar transistors (IGBTs) is as follows. Each of the first and second IGBTs are turned on in alternating cycles of a system clock such that in any given cycle of the system clock only one of the first and second IGBTs is turned on.
In one embodiment, a first signal having a frequency one half that of the system clock is generated for driving a gate terminal of the first IGBT. The first signal causes the first IGBT to turn on when the first signal is in a first state. a second signal having a frequency one half that of the system clock is generated for driving a gate terminal of the second IGBT. The second signal causes the second IGBT to turn on when the second signal is in the first state.
In another embodiment, the system clock is a fixed frequency pulse-modulated clock.
In accordance with another embodiment of the present invention, an apparatus includes first and second IGBTs connected together in parallel. A driving circuit is configured to generate a first signal for turning on the first IGBT in every other cycle of a system clock, and to generate a second signal for turning on the second IGBT in every other cycle of the system clock such that in any given cycle of the system clock only one of the first and second IGBTs is turned on.
In one embodiment, in response to at least the system clock, the driving circuit generates the first and second signals each having a frequency one half that of the system clock.
In another embodiment, the driving circuit further includes a trigger flip-flop configured to generate a third signal and a fourth signal in response to at least the system clock. The fourth signal is a complement of the third signal.
In another embodiment, the trigger flip-flop is configured so that the third signal makes a transition only in response to every falling edge of the system clock.
In another embodiment, the trigger flip-flop is configured so that the third signal makes a transition only in response to every rising edge of the system clock.
In another embodiment, the driving circuit further includes a first logic gate configured to generate the first signal and a second logic gate configured to generated the second signal. The first logic gate performs and AND function on the third signal and the system clock, and the second logic gate performs and AND function on the fourth signal and the system clock.
In another embodiment, the trigger flip-flop is a clocked J-K flip-flop in which terminals J and K are connected to a high logic level.
In accordance with yet another embodiment of the present invention, a power factor corrector system includes a rectifier circuit coupled to convert an AC signal to a DC signal, and first and second IGBTs connected together in parallel. An inductor is coupled between the rectifier and a common collector of the first and second IGBTs. A fast recovery diode is coupled between a capacitor and the common collector of the first and second IGBTs. A driving circuit coupled to turn on the first IGBT in every other cycle of a fixed frequency pulse-modulated system clock, and to turn on the second IGBT in every other cycle of the system clock such that in any given cycle of the system clock only one of the first and second IGBTs is turned on.
In one embodiment, in response to at least the system clock, the driving circuit generates a first signal and a second signal each having a frequency one half that of the system clock. The first signal is coupled to a gate terminal of the first IGBT and the second signal is coupled to a gate terminal of the second IGBT.